Date(s) - 11/29/2018
11:30 am - 12:30 pm

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DDR3 design technology is not just for high-end PCB design. These days, it’s used in a wide variety of applications. A proper understanding of the basics of DDR design is important as DDR3 is a complex bus. For example, meeting timing and SI margins becomes more and more difficult with more complex PCB layout. DDR analysis can be very complex and might require a large number of simulations across many nets.

What You Will Learn

  • Basics of DDR technology
  • Understanding timing parameters and margins
  • Setting up DDR simulation
  • Understanding the results of DDR simulation
  • How to avoid failures in DDR analysis

Who Should Attend

  • Anyone who wants to learn about the fundamentals of DDR design
  • Signal integrity specialists
  • Hardware engineers
  • PCB designers
  • Design engineers


Bookings are closed for this event.