Date/Time
Date(s) - 08/16/2017
10:00 am - 11:00 am

Categories


Designing PCBs with DDR3
Wednesday August 16, 2017
10am

Overview

DDR3 design technology is not just for high-end PCB design. These days, it’s used in a wide variety of applications. A proper understanding of the basics of DDR design is important as DDR3 is a complex bus. For example, meeting timing and SI margins becomes more and more difficult with more complex PCB layout. DDR analysis can be very complex and might require a large number of simulations across many nets.

This webinar reviews the fundamentals of designing DDR circuits, including how to simulate the design, how to analyze the results, and how to use the PADS Product Creation platform to avoid failures.

What You Will Learn

  • Basics of DDR technology
  • Understanding timing parameters and margins
  • Setting up DDR simulation
  • Understanding the results of DDR simulation
  • How to avoid failures in DDR analysis

Who Should View

  • Anyone who wants to learn about the fundamentals of DDR design
  • Signal integrity specialists
  • Hardware engineers
  • PCB designers
  • Design engineers

We hope you can join us for the webinar.

 

Bookings

Bookings are closed for this event.