Date/Time
Date(s) - 06/01/2018
11:30 am - 12:30 pm

Categories


Avoid “Mission Failure” in your FPGA Design
Thursday June 28, 2018
11:30 am

 

Safety Critical design is defined as any application where if your circuit fails the “mission” fails.  Mission failure could be: vehicle crashes (automotive, aviation), patient dies (medical), or even money is lost (banking).  Because of the risks involved these industries have put in place strict rules for requirements tracking and testing to ensure the mission does not fail.  Many application even required that an outside auditor review the project to ensure compliance with these rules.

In this webinar we will discuss the fundamentals of requirements tracing and how ReqTracer function as the hub for all requirements tracing activity.  We will show how CoverCheck can help you achieve 100% code coverage by guiding stimulus generation or through generation of exception for unreachable code.  Finally for systems using encryption and encryption keys we will should how SecureCheck helps ensure that your encryption circuitry is safe from backdoor accesses.

What you will learn:

What is Requirements Tracing
How use of ReqTracer saves time and provides a more robust solution
How CoverCheck can help you to achieve 100% code coverage
How SecureCheck provides proof of no backdoor access to protected data

Who Should Attend:

Design Engineers
FPGA Designers
Verification Engineers and managers

Bookings

Bookings are closed for this event.